MIMOS - IC DESIGN LAYOUT EXTRACTION

Resistance and Capacitance Extractor.

MIMOS - IC DESIGN VHDL COMPILER TOOL

Translates VHDL to gate-level

MIMOS - IC DESIGN SCHEMATIC EDITOR L TIER

Schematic design editor

MIMOS - IC DESIGN LAYOUT VERSUS SCHEMATIC CHECKER XL TIER

Layout versus schematic checker

MIMOS - IC DESIGN CALIBRE ADVANCED DEVICE PROPERTIES

Advanced device properties attached to devices in the extracted netlist

MIMOS - IC DESIGN POWER SYNTHESIS

Minimizes power consumption at the RTL and gate level

MIMOS - IC DESIGN RULE CHECKER XL TIER

Physical design rule checker

MIMOS - IC DESIGN PHYSICAL VERIFICATION

Physical design verification

MIMOS - IC DESIGN ANALOG DESIGN ENVIROMENT XL TIER

Advanced analog design and simulation platform (addition to L tier)

MIMOS - IC DESIGN LAYOUT VERIFICATION

Verify IC Design Layout geometry.

MIMOS - SILICON-PROVEN IP

Library of IPs for design and verification

MIMOS - IC DESIGN SCHEMATIC VERILOG INTERFACE

Schematic design editor with Verilog interface

MIMOS - IC DESIGN RTL SYNTHESIS

Synthesis RTL source code.

MIMOS - IC DESIGN HDL COMPILER TOOL

Translates Verilog HDL to gate-level

MIMOS - IC DESIGN STATIC TIMING AND POWER ANALYSIS TOOL

Static timing analyzer